This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain.
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This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain.
Read Less
Add this copy of Design-for-Test and Test Optimization Techniques F to cart. $83.23, new condition, Sold by Educational Media Centre rated 4.0 out of 5 stars, ships from New Delhi, DELHI, INDIA, published 2016 by Springer.
Add this copy of Design-for-Test and Test Optimization Techniques F to cart. $84.74, new condition, Sold by Educational Media Centre rated 4.0 out of 5 stars, ships from New Delhi, DELHI, INDIA, published 2016 by Springer.
Add this copy of Design-for-Test and Test Optimization Techniques F to cart. $99.87, new condition, Sold by Basi6 International rated 5.0 out of 5 stars, ships from Irving, TX, UNITED STATES, published 2016 by Springer.
