This book is a monograph devoted to logic synthesis and optimization for CPLDs. The methods strive to find the optimum fit for the combinational logic and finite state machines to the structure of the logic device and aim at area and speed optimization.
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This book is a monograph devoted to logic synthesis and optimization for CPLDs. The methods strive to find the optimum fit for the combinational logic and finite state machines to the structure of the logic device and aim at area and speed optimization.
Read Less