Designers of high-speed integrated circuits face a bewildering array of choices and too often spend frustrating days tweaking gates to meet speed targets. Logical Effort: Designing Fast CMOS Circuits makes high speed design easier and more methodical, providing a simple and broadly applicable method for estimating the delay resulting from factors such as topology, capacitance, and gate sizes. The brainchild of circuit and computer graphics pioneers Ivan Sutherland and Bob Sproull, "logical effort" will change the way you ... Read More
Designers of high-speed integrated circuits face a bewildering array of choices and too often spend frustrating days tweaking gates to meet speed targets. Logical Effort: Designing Fast CMOS Circuits makes high speed design easier and more methodical, providing a simple and broadly applicable method for estimating the delay resulting from factors such as topology, capacitance, and gate sizes. The brainchild of circuit and computer graphics pioneers Ivan Sutherland and Bob Sproull, "logical effort" will change the way you approach design challenges. This book begins by equipping you with a sound understanding of the method's essential procedures and concepts-so you can start using it immediately. Later chapters explore the theory and finer points of the method and detail its specialized applications. Read Less
Add this copy of Logical Effort: Designing Fast Cmos Circuits (the to cart. $10.88, fair condition, Sold by Dream Books Co. rated 5.0 out of 5 stars, ships from Denver, CO, UNITED STATES, published 1999 by Morgan Kaufmann.
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Fine. Trade paperback (US). Glued binding. 256 p. The Morgan Kaufmann Computer Architecture and Design. In Stock. 100% Money Back Guarantee. Brand New, Perfect Condition, allow 4-14 business days for standard shipping. To Alaska, Hawaii, U.S. protectorate, P.O. box, and APO/FPO addresses allow 4-28 business days for Standard shipping. No expedited shipping. All orders placed with expedited shipping will be cancelled. Over 3, 000, 000 happy customers.
Add this copy of Logical Effort: Designing Fast CMOS Circuits to cart. $97.60, like new condition, Sold by GreatBookPrices rated 4.0 out of 5 stars, ships from Columbia, MD, UNITED STATES, published 1999 by Morgan Kaufmann Publishers.
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Fine. Trade paperback (US). Glued binding. 256 p. The Morgan Kaufmann Computer Architecture and Design. In Stock. 100% Money Back Guarantee. Brand New, Perfect Condition, allow 4-14 business days for standard shipping. To Alaska, Hawaii, U.S. protectorate, P.O. box, and APO/FPO addresses allow 4-28 business days for Standard shipping. No expedited shipping. All orders placed with expedited shipping will be cancelled. Over 3, 000, 000 happy customers.
