This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage.
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This book presents two techniques to reduce leakage power in digital VLSI ICs. The first reduces leakage through the selective use of high threshold voltage sleep transistors, while the second by applying the optimal Reverse Body Bias voltage.
Read Less
Add this copy of Minimizing and Exploiting Leakage in Vlsi Design to cart. $88.59, new condition, Sold by Educational Media Centre rated 4.0 out of 5 stars, ships from New Delhi, DELHI, INDIA, published 2014 by Springer.
Add this copy of Minimizing and Exploiting Leakage in Vlsi Design to cart. $107.14, new condition, Sold by Basi6 International rated 5.0 out of 5 stars, ships from Irving, TX, UNITED STATES, published 2014 by Springer.
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