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151. High-Level System Modeling
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152. Formal Semantics for Vhdl
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153. Vhdl? 92: the New Features of the Vhdl Hardware Description Language (the Springer International Series in Engineering and Computer Science, 229)
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154. Formal Semantics and Proof Techniques for Optimizi
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155. High-Level System Modeling
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156. Analog and Mixed-Signal Hardware Description Langu
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157. The Verilog Pli Handbook: a User? S Guide and Comprehensive Reference on the Verilog Programming Language Interface
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158. Formal Semantics for Vhdl
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159. Analog Vhdl
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160. Writing Testbenches: Functional Verification of Hdl Models
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161. High-Level System Modeling
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162. Formal Semantics for Vhdl
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163. Analog and Mixed-Signal Hardware Description Langu
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164. High-Level System Modeling: Specification Languages
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165. Formal Semantics and Proof Techniques for Optimizing VHDL Models
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166. High-Level System Modeling: Specification Languages (Current Issues in Electronic Modeling)
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167. Vhdl for Simulation, Synthesis and Formal Proofs O
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168. Vhdl for Simulation, Synthesis and Formal Proofs O
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